df2 b6m4 sl 20 1 5 - 0 9 - 2 9 1 toshiba diodes f or p rotecting a gainst esd df2 b 6 m 4 s l application - esd protection note: this product is designed for protection against electrostatic discharge (esd) and is not intended for any other purpose, including, but not limited to, voltage regulation. abusolute maximum r atings ( ta = 25 c ) c haracteristic s ymbol r ating u nit electrostatic discharge voltage iec61000 - 4 - 2(contact) iec61000 - 4 - 2( air ) v esd (note 1) 2 3 25 kv peak pulse power ( tp = 8 / 20 s ) p pk 30 w maximum p eak pulse current ( tp = 8 / 20 s ) i pp (note 2 ) 2 a junction te mperature t j 15 0 ? c storage te mperature range t stg ? 55 to 15 0 ? c note1 : according to iec61000 - 4 - 2 note 2 : according to iec61000 - 4 - 5 note 3 :using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly eve n if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings.please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook (handling precautions/ derat ing concept and methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). e lectrical c haracteristics ( ta = 25 c ) v rwm : working peak reverse voltage v br : reverse breakdown voltage i br : reverse breakdow n current i r : reverse current v c : clamping voltage i pp : peak pulse current r dyn : dynamic resistance jedec D ? jeita D toshiba D weigh t: 0.2 m g (typ.) s l 2 1:pin1 2:pin2
df2 b6m4 sl 20 1 5 - 0 9 - 2 9 2 c haracteristic s ymbol t est c ondition m in t yp. m ax u nit reverse stand - off vo ltage v rwm D D D 5 . 5 v reverse breakdown vo ltage v br i br = 1 ma 5. 6 6. 2 8 v r everse cur rent i r v r wm = 5 .5 v D D 0.1 ? a clamping voltage vc i pp =1a (note1) D 8.5 D v ? vc i pp =2 a (note1) D 10 15 v ? clamping voltage vc itlp=16a (note2) D 18 D v vc itlp=30a (note2) D 25 D v dynamic resistance r dyn (note2) D 0.5 D ? total c apacitance c t v r ? 0 v, f ? 1 mhz (note3) D 0.2 0.3 pf note1 based on iec61000 - 4 - 5 8/20 s pulse. note2 tlp parameter: z0 = 50 , tp = 100ns, tr = 300ps, averaging window: t1 = 30 ns to t2 = 60 n s, extraction of dynamic resistance using least squares fit of tlp characteristics between ipp1 = 8a and ipp2 = 16 a. note3 guaranteed by design. equivalent circuit (top view) marking land pattern dimensions for reference only p in 1 mark 1 2
df2 b6m4 sl 20 1 5 - 0 9 - 2 9 3 characteristics curves (note) note: the above characteristics curves are presented for reference only and not guaranteed by production test , unless otherwise noted. c t - v r c t - f ta=25 , f = 1mhz total capacitance c t ( pf ) reverse voltage v r (v) vr=0v , ta=2 5 f requency f ( mhz ) total capacitanc e c t ( pf ) i r - v r i - v reverse vo ltage v r (v) reverse current i r ( n a ) ta=2 5 current i (ma) voltage v (v) - 10 - 8 - 6 - 4 - 2 0 2 4 6 8 10 - 10 - 8 - 6 - 4 - 2 0 2 4 6 8 10 current i (ma) voltage v (v) ta=2 5 ta=100 2 5 5 0 7 5 0 0.1 0.2 0.3 0.4 0.5 1000 10000 0 0.1 0.2 0.3 0.4 0.5 0 1 2 3 4 5 6
df2 b6m4 sl 20 1 5 - 0 9 - 2 9 4 note: the above characteristics curves are presented for reference only and not guaranteed by production test, unl ess otherwise noted. tlp tlp voltage (v) tlp current ( a ) z0 = 50 tp = 100 ns tr = 300 ps vc - i pp t a=25 peak pulse current i pp ( a ) clamp voltage v c ( v ) based on iec61000 - 4 - 5 8/20 s pulse. (ed2) tlp voltage (v) tlp current ( a ) fig based on iec61000 - 4 - 5 8/20 s pulse.(ed.2) z0 = 50 tp = 100 ns tr = 300 ps tlp voltage ( v ) tlp current ( a ) 0 2 4 6 8 10 12 14 16 18 20 0 0.5 1 1.5 2 2.5 100% 90% 50% 10% 0% i t 8 s 20 s t
df2 b6m4 sl 20 1 5 - 0 9 - 2 9 5 note: the above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwis e noted. insertion loss ( s21 ) s21 - f f requency (g hz) s21 ( db ) t a=25 fig. s21 measurement circuit ta=25 in sg out network analyzer s21
df2 b6m4 sl 20 1 5 - 0 9 - 2 9 6 esd clamp waveform (iec61000 - 4 - 2) (note) fig. iec61000 - 4 - 2 (contact) t (ns) t (ns) - 8kv contact esd v cl (v) v cl - max - peak = - 1 00 v v cl - 30ns - peak = - 2 0 v v cl - 60ns - peak = - 1 2 v 20 0 - 20 - 40 - 60 - 80 - 100 - 120 - 140 +8kv contact esd v cl (v) v cl - max - peak = 1 0 4 v v cl - 30ns - peak = 21 v v cl - 60ns - peak = 1 2 v 1 40 120 100 80 60 40 20 0 - 20 - 10 0 10 20 30 40 50 60 70 80 90 - 10 0 10 20 30 40 50 60 70 80 90 t (ns) t (ns) - 15 kv contact esd v cl (v) 5 0 0 - 5 0 - 10 0 - 15 0 - 20 0 - 25 0 - 30 0 - 35 0 + 15 kv contact esd v cl (v) v cl - max - peak = 140 v v cl - 30ns - peak = 35 v v cl - 60ns - peak = 26 v 35 0 30 0 25 0 20 0 15 0 10 0 5 0 0 - 5 0 - 10 0 10 20 30 4 0 50 60 70 80 90 - 10 0 10 20 30 40 50 60 7 0 80 90 v cl - max - peak = - 150 v v cl - 30ns - peak = - 32 v v cl - 60ns - peak = - 18 v note: the above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted.
df2 b6m4 sl 20 1 5 - 0 9 - 2 9 7 packag e dimensions 0.2 sl2
df2 b6m4 sl 20 1 5 - 0 9 - 2 9 8 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collectively "toshiba"), reserve the right to make changes to the i nformation in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduced without prior written permission from toshiba. even with toshiba's written permission, reproduction is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to i mprove product's quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, softwar e and systems which minimize risk and avoi d situations in which a malfunction or failure of product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. before customers use the product, create designs including t he product, or incorporate the pro duct into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant toshiba information, including without limitation, this document, the specifications, the data sheets and applic ation notes for product a nd the precautions and conditions set forth in the "toshiba semiconductor reliability handbook" and (b) the instructions for the application with which the product will be used with or for. customers are solely responsible for all as pects of their own prod uct design or applications, including but not limited to (a) determining the appropriateness of the use of this product in su ch design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in ch arts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operat ing parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. ? 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